Showing posts with label Tri-state. Show all posts
Showing posts with label Tri-state. Show all posts

Saturday, March 23, 2013

Tri-state logic

Tri-state logic

Tri-state logic also called as three-state logic.
The tri-state condition always can find in buffer or inverter gate.

For normal logic, it only have 2 logic, there are HIGH (1) and LOW (0). But, 3-state logic allows an output port to have HIGH (1), LOW (0) and High impedance (High-Z).

As normal logic circuit, the gate will supply voltage at HIGH, pull voltage level to 0V at LOW. The High impedance (High-Z) condition is the gate is remove (open) from the circuit, the gate output in floating condition. As electrically figure show, the switch at high and low in open condition.

The other word, the High-Z output influence to the rest of the circuit is removed, and the circuit node will be “floating”, if no other circuit element determines its state. The floating mean, the point before opened (connect nothing, like Open Collector circuit).


The application of High –Z 
  1. The High-Z state is to effectively remove the device's influence from the rest of the circuit. 
  2. If more than one device is electrically connected, putting an output into the Hi-Z state is often used to prevent short circuits, or one device driving high (logical 1) against another device driving low (logical 0). The other word, release the control to other device.

Example circuit

The tri-state logic can found in bus circuit, there have multiple device is sharing the same connection. The IO port need 2 tri-state logic to managed input and output signal.

For today micro-controller and most of digital device offer the tri-state output and it can control by CS (chip select) or Enable pin. The tri-state logic gates are no longer familiar.